German Published Patent Application No. 197 21 366 relates to an electric circuit system for checking a series connection, made of a switch and a load, having a first circuit which is connected to a connection point between the switch and the load and which is suitable for detecting a first state, the first state representing a short circuit of the connection point to the supply voltage. This circuit system provides a second circuit which is parallel-connected to the first circuit wherein the second circuit is connected to the connection point and is suitable for detecting a second or a third state, the second state representing a short circuit of the connection point to ground, and the third state representing an interruption of the connection point to the supply voltage.
Safety-related systems in motor vehicles, for example, must not lead to a safety-critical state, even in an event of a fault. A so-called FMEA analysis (failure mode and effects analysis) is usually carried out in conjunction with such identifications. Typically, low levels of the system are described within the scope of a FMEA analysis. They may be individual components or low-level configurations. For each such low level, a list of possible faulty operating modes is generated, effects of the possible faulty operating modes subsequently being determined.
For electronic control devices, short circuits between two adjacent output PINs of an integrated circuit, in the following referred to as IC, are considered among other things within the scope of an FMEA analysis.
Typical difficulties within the framework of a FMEA analysis are, for example, that short circuits between adjacent PINs, (i.e. output PINs of output drivers) must not lead to a safety-critical switch-off path becoming inoperative. Furthermore, by readback of a critical output signal, it must be able to be ensured that a fault in the signal transmission between two ICs is detected.
In the case of customary output drivers of CMOS-ICs, the transistor on the supply-voltage side, hereinafter designated as a highside transistor, and the ground-side transistor, hereinafter designated as a lowside transistor, have the same drain-source resistance RDSon when the transistor (MOSFET) is switched on. The result is that in response to a short circuit between two PINs of adjacent output drivers, an undefined state may result if one of the outputs is switched to logic H, and the other is switched to logic L.